;; Generated automatically by iniprep tool on Sun Jun 05 11:50:37 IDT 2011 from ./b0_hawk3_gen2.prs
;;
;; PRS  FILE FOR Hawk
;; $Id: b0_hawk3_gen2.prs,v 1.19 2011-02-14 11:47:28 achiad Exp $


[PS_INFO]
Name = MNPH29C-XTR_A2-A4
Description = ConnectX-2 EN network interface card; dual-port SFP+; PCIe2.0 x8 5.0GT/s; tall bracket; RoHS R6

[ADAPTER]
PSID = MT_0DB0120010
pcie_gen2_speed_supported = true
silicon_rev=0xb0
adapter_dev_id = 0x6750

;;;;; {gpio_mode1, gpio_mode0} {DataOut=0, DataOut=1}
;;;;; 0 = Input PAD
;;;;; 1 = {0,1} Normal Output PAD
;;;;; 2 = {0,Z} 0-pull down the PAD, 1-float
;;;;; 3 = {Z,1} 0-float, 1-pull up the pad
;;;;; Under [ADAPTER] section
;;;;; Integer parameter. Values range : 0x0 - 0xffffffff.

gpio_mode1 = 0x80400
gpio_mode0 = 0x0d160bef
gpio_default_val = 0x050e070f

[HCA]
hca_header_device_id = 0x6750
hca_header_subsystem_id = 0x0011
eth_xfi_en = true
mdio_en_port1 = 0

[IB]
gen_guids_from_mac = true
port1_802_3ap_kx4_ability = false
port2_802_3ap_kx4_ability = false
phy_type_port1 = XFI
phy_type_port2 = XFI

read_cable_params_port1_en = true
read_cable_params_port2_en = true

eth_tx_lane_polarity_port1 = 0x0
eth_rx_lane_polarity_port1 = 0x0
eth_tx_lane_polarity_port2 = 0x0
eth_rx_lane_polarity_port2 = 0x0

eth_tx_lane_reversal_port1 = off
eth_tx_lane_reversal_port2 = off
eth_rx_lane_reversal_port1 = off
eth_rx_lane_reversal_port2 = off


;;;;; SerDes static parameters for FixedLinkSpeed
;;;;; Under [IB] section

port1_sd0_muxmain_qdr = 0x1f
port2_sd0_muxmain_qdr = 0x1f
port1_sd1_muxmain_qdr = 0x1f
port2_sd1_muxmain_qdr = 0x1f
port1_sd2_muxmain_qdr = 0x1f
port2_sd2_muxmain_qdr = 0x1f
port1_sd3_muxmain_qdr = 0x1f
port2_sd3_muxmain_qdr = 0x1f

port1_sd0_ob_preemp_pre_qdr = 0x0
port2_sd0_ob_preemp_pre_qdr = 0x0
port1_sd1_ob_preemp_pre_qdr = 0x0
port2_sd1_ob_preemp_pre_qdr = 0x0
port1_sd2_ob_preemp_pre_qdr = 0x0
port2_sd2_ob_preemp_pre_qdr = 0x0
port1_sd3_ob_preemp_pre_qdr = 0x0
port2_sd3_ob_preemp_pre_qdr = 0x0

port1_sd0_ob_preemp_post_qdr = 0x6
port2_sd0_ob_preemp_post_qdr = 0x6
port1_sd1_ob_preemp_post_qdr = 0x6
port2_sd1_ob_preemp_post_qdr = 0x6
port1_sd2_ob_preemp_post_qdr = 0x6
port2_sd2_ob_preemp_post_qdr = 0x6
port1_sd3_ob_preemp_post_qdr = 0x6
port2_sd3_ob_preemp_post_qdr = 0x6

port1_sd0_ob_preemp_main_qdr = 0x0
port2_sd0_ob_preemp_main_qdr = 0x0
port1_sd1_ob_preemp_main_qdr = 0x0
port2_sd1_ob_preemp_main_qdr = 0x0
port1_sd2_ob_preemp_main_qdr = 0x0
port2_sd2_ob_preemp_main_qdr = 0x0
port1_sd3_ob_preemp_main_qdr = 0x0
port2_sd3_ob_preemp_main_qdr = 0x0

port1_sd0_ob_preemp_msb_qdr = 0x0
port2_sd0_ob_preemp_msb_qdr = 0x0
port1_sd1_ob_preemp_msb_qdr = 0x0
port2_sd1_ob_preemp_msb_qdr = 0x0
port1_sd2_ob_preemp_msb_qdr = 0x0
port2_sd2_ob_preemp_msb_qdr = 0x0
port1_sd3_ob_preemp_msb_qdr = 0x0
port2_sd3_ob_preemp_msb_qdr = 0x0

center_mix90phase = true 

ext_phy_board_port1 = HAWK3
ext_phy_board_port2 = HAWK3

;;;;; External Phy: ignore mellanox OUI checking.
;;;;; Under [IB] section
;;;;; Integer parameter. Values range : 0x0 - 0x1.

ignore_mellanox_oui = 0x1

;;;;; External Phy check GPIOs values for the 4 configurable GPIOs per port.
;;;;; every GPIO has 2 bits that can get the values "00", "01", "11" - dont check.
;;;;; Under [IB] section
;;;;; Integer parameter. Values range : 0x0 - 0xff.

ext_phy_check_value_port1 = 0xff
ext_phy_check_value_port2 = 0xff

[PLL]
lbist_en  = 0
lbist_shift_freq  = 3
pll_stabilize = 0x13
flash_div = 0x3
lbist_array_bypass = 1
lbist_pat_cnt_lsb = 0x2
core_f = 44
core_r = 27
ddr_6_db_preemp_pre = 0x3
ddr_6_db_preemp_main = 0xe


[FW]

